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Aeva

Board Validation and Test Engineer

Compensation
$125.8K–$170.2K / yr
Location
Mountain View, CA, US
Arrangement
On-site
Employment type
Full-time
Posted
24 July 2026 (about 2 months ago)

Checked about a month agoApplications go to the employer, never to RoleSprint

About this role

What you'll be doing: • Drive PCBA testability (DFT) from schematic and functional reviews for high-volume manufacturing. Work with electrical design team to assess test point and boundary scan coverage, and other DFT techniques into board designs to enhance test coverage and fault detection.

• Develop test platforms for initial board bring up and low volume prototype and engineering validation builds. Write test methods and extract metrics using python programming for these test platforms.

• Assess contract manufacturing capabilities and define the requirements for in-circuit test (ICT) and functional test (FCT) for high volume manufacturing.

• Drive board yield fallout investigations by isolating intermittent, marginal, and low-yield failures using systematic debug methods including debug of power integrity, clocks, resets, boot sequences, and mixed-signal paths.

• Correlate ICT/FCT failures with schematic intent, layout, and silicon performance.

• Use advanced instrumentation (scopes, logic analyzers, current probes, thermal tools) to capture elusive failures.

• Create debug playbooks, DFT guidelines, and failure isolation documentation.

• Collaborate with engineering and manufacturing teams to ensure on time delivery with optimum test coverage at lowest cost.

• Document test strategies, procedures, and results for internal reference and compliance purposes.

• Provide end-to-end support through entire product life cycle from NPI (New Product Introduction) to high volume manufacturing.

What you'll have: • Bachelor’s degree in Electrical/Electronics Engineering or equivalent experience

• 7+ years of hands-on experience in board bring up and validation

• DFT experience and strong practical knowledge for ICT and FCT

• Expert ability to read and critique schematics and PCB layouts

• Deep understanding of analog, digital, power, and mixed-signal systems and boundary scan (JTAG)

• Proven track record of improving yield through DFT and failure analysis learnings

• Hands-on experience in Python programming for test automation

• Experience with data analysis using tools such as JMP and dashboards

• Excellent problem-solving skills and the ability to troubleshoot complex technical issues

• Strong communication and teamwork skills to collaborate effectively with cross-functional teams

• Experience working with CMs worldwide

• Excellent verbal and written communication and presentation skills and capable of making clear conclusions and recommendations

What's in it for you: • Be part of an early start-up that's backed by industry-leading venture capitalists

• Very competitive compensation and meaningful equity!

• Exceptional benefits: Medical, Dental, Vision, and more!

• 401k matching

• Unlimited PTO: We care about results, not punching timecards

• Paid lunches, ping pong tournaments, and fun team off-sites!

Work location

  • Mountain View, CA, US

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About this listing

Advertised by Aeva and published on Lever, the applicant tracking system they use.

RoleSprint is not the employer and not a recruiter. Applications are made on the employer’s own site and never reach us; what RoleSprint does is help you decide whether a role is worth your time and prepare for it if it is.

Published 24 July 2026, last checked about a month ago. A posting stops being advertised here 90 days after the employer published it, and one the employer takes down is marked closed rather than quietly removed.

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